9 August 2001

The Qualcomm Multiplier is used to multiply synthesizer outputs in the 2 GHz frequency range
by X4 or X5 to the 10-13 GHz frequency range. As-is, the multiplier's pc board was designed to
multiply 2.620 GHz times 5 to 13.1 GHz, with a 2 GHz drive level of +10 dBm to provide +7 dBm
of output power at 13.1 GHz. The pc board is quite small measuring 1 5/8 inch by 2 3/4 inches. The
board is populated with two stages of Mgf-1302 FETs and two dc control transistors one for each
FET.The first stage multiplies to 13.1 GHz driving a stripline filter to the second stage output
amplifier. TheDC power requirements are minus 5 volts bias and plus 10 volts dc.Figure 1 shows
the unmodified pc board and indicates the areas involved in this modification.

This board is a natural to drop into a 2 by 3 inch housing for frequency multiplication schemes in
the 10 to 13 GHz frequency ranges. Our earlier Qualcomm output filter modification schemes for
10 GHz used a 1/2 inch pipe-cap filter in place of the original stripline output filter. That board was
nearly 3 times larger than this newer smaller multiplier board. This means that you can have a 2.x GHz
multiplier to 10 or 12 GHz in a small aluminum box of 2 by 3 inches by 1/2 to 3/4 inch high. The filter
approach for the new small board is to use standard stripline extensions made of copper strips the
same size as the original stripline filter elements Extending the element lengths lowers the resonant
frequency from 13.1 GHz to the new multiplier output frequency range.

The Modification

Overview: The new dimensions in this modification are specifically to multiply a 2.556 GHz input
X4 to 10.224 GHz as an LO for 10.368 GHz operation. You will add a 1.5 pF chip cap to the
existing input filter. This improves the drive to the multiplier stage in the vicinity of 2.5 GHz.
Modifications to the multiplier circuit output filter consist of extending three stripline filter element
lines by strips of copper soldered to the original stripline elements. This re-tunes the filter for best
output at the 4th harmonic for a 10.2-10.4 GHz LO. The gate tab improves the output by about
1 dB. Typical output power can be +4 to +8 dBm. This of course depends on drive and re-tune
success.

Details. The conversion consists of adding the 1.5 pF chip cap in piggyback fashion, soldered on
top of the existing filter series chip cap. See Figure 2. Next extend the three filter elements located
between the multiplier transistor and the output power amplifier. The length of the half wave filter
elements are changed as follows, the EL#1 line length changes to .367 inches, the EL#2 line length
changes to .345 inch, and the EL#3 length changes to .392 inch for best output over the 10.224-
0.368 GHz range. The result is shown in Figure 3. Finally, add a small snowflake tab to the
stripline adjacent to the gate of the FET output amplifier and toward the resistor marked "510"
Figure 3 also shows this small tab, on the left side of the strip-line below the FET. Figure 4
shows the modified pc board enclosed in a milled aluminum shielded enclosure. The power
feedthrus and two SMA connectors complete the package.

If you need to have a different output frequency range than the 10.224-10.368 GHz described
above, then the output filter element lengths and gate tab dimensions will need to be experimentally
redetermined.

The multiplier pc board has a notch in one corner about .75 by 1.5 inches in size. Although I
didn't take advantage of this space in the modified unit in this article, the notch allows room for
a small internal power converter in the same enclosure. The power converter could provide the
5V negative bias of 1 ma or so, and regulated +10 V, allowing the multiplier to be self-contained
operating from a +12 volt dc main supply.

Again as with all modified Qualcomm material, DO NOT CONTACT QUALCOMM for
information on these devices. Please contact Chuck Houghton, WB6IGP, clhough@pacbell.net,
or Kerry Banke, N6IZW, kbanke@aol.com for any information or availability.